The present invention relates generally to the field of voltage controlled oscillators, and more particularly, the invention is directed to an apparatus and a method for controlling the phase shift of a voltage controlled oscillator independent of changing the oscillation frequency.
A voltage controlled oscillator (VCO) is simply a circuit that generates an oscillating signal at a frequency proportional to an externally supplied voltage. VCOs are basic building blocks of many electronic systems especially phase-locked loops and may be found in computer disk drives, wireless electronic equipment such as cellular telephones, and other systems in which oscillation frequency is controlled by an applied tuning voltage. There are three basic designs for VCOs: an inductor/capacitor (LC) oscillator; a ring oscillator; and a relaxation or multivibrator oscillator.
In computer disk drive applications, ring oscillators have been used. Ring oscillators use voltage-controlled variable delay cells connected into a ring. The circuit oscillates at a frequency equal to the voltage controlled cell delay multiplied by twice the number of delay stages. Although high frequencies can be obtained with ring oscillators, they are susceptible to noise and jitter.
The multivibrator or relaxation oscillator oscillates by continuously charging and discharging a capacitor between two voltage levels using a voltage-controlled current source that supplies the current for charging and discharging the capacitor. These multivibrators are relatively simple, require few devices, and are capable of high speeds up to 7.4 GHz. The oscillation frequency, however, is partially dependent upon the capacitor value and is rather sensitive to thermal effects. Because of the sensitivity of the ring oscillators to noise and jitter and because of the sensitivity of the multivibrator or relaxation oscillator to thermal effects, experts in the industry use an oscillator based on inductors and capacitors, the LC oscillator, which is less susceptible to noise and jitter than the previously mentioned oscillator types.
One type of LC oscillator uses a field effect transistor (FET) as a varactor, i.e., a variable capacitance device, by electrically connecting the source and drain to provide a first terminal and the gate of the transistor then provides the other terminal. The capacitance of the modified FET varies significantly with the applied voltage. The capacitance is not only a function of the thickness of the gate oxide of the FET but also its size and whether the FET is in the depleted mode or is in the inverted mode. Transitioning the variable FET capacitor between inverted and depleted mode can yield a capacitance ratio of four or five to one. The capacitance and subsequently the frequency can be finely tuned by varying the voltage difference between the source/drain and the gate of the FET. Pairs of binary weighted FETs may be connected in parallel with a fixed capacitor to yield a voltage controlled tuning circuit. The effective capacitance of selected pairs of FETs can be varied and even switched into or out of a desired capacitive state to yield broadband performance. For example, by the inclusion of four such pairs, a four bit input provides a selection of up to sixteen different bands. Thus, the voltage controlled oscillator circuit having the FETs arranged as above into variable capacitive pairs may be switched in and out of different frequencies exhibiting operational characteristics that are relatively immune to parasitic effects.
Such a voltage controlled oscillator is particularly described in Mourant et al., xe2x80x9cA Low Phase Noise Monolithic VCO in SiGe BiCMOSxe2x80x9d IEEE Radio Frequency Integrated Circuits Symposium 65-68 (2000), also in U.S. patent application Ser. No. 09/483,368 filed Jan. 14, 2000, now abandoned, entitled xe2x80x9cA Band-Switched Integrated Voltage Controlled Oscillatorxe2x80x9d by Mourant et al., which is commonly owned by the assignee herein and hereby incorporated by reference in its entirety. The voltage controlled oscillator of Mourant et al. takes advantage of the phenomena described above that a MOSFET becomes a variable capacitor when its source and drain are connected together. The gate to source/drain capacitance varies to a much greater degree with the applied voltage than the alternative reverse bias P/N diode resulting in a VCO circuit having a wide tuning range. Because switching into capacitive mode induced by the applied voltage is abrupt, the modified FET circuit of Mourant et al. is ideal in digital switching circuits, particularly in high frequency operations such as cellular telephones and/or in certain computer disk drive circuits. For precise frequency applications, however, the use of the binary-weighted FETS can only get so close; there must be an analog capacitor provided by a pair of diodes.
With respect to FIG. 1, a conventional phase-locked loop (PLL) 10 is shown. The PLL comprises conventional elements such as a charge pump 20 and a loop filter 22. Loop filter 22 comprises the capacitor 24 and a resistor 26 in series with the capacitor 24 to achieve rapid lock-in of the appropriate frequency. The voltage across the loop filter 22 is provided to a varactor driver 28 which provides a voltage to the oscillator 30 to generate a signal having a frequency proportional to the input voltage from the driver 28. The frequency is prescaled 32 to become a clock signal 34 of a selected frequency which is input to the timing detector 36. The data 38 is also input to the timing detector 36 which detects the difference, if any, between the frequency and the phase of the data 38 and the clock 34. If there is a difference between the frequencies and/or phase of the signals, then a timing correction signal 40 is fedback to the charge pump 20 to adjust the charge on the capacitor 24 which in turn adjusts the clock frequency 34 by another iteration of the process described above. There is, its however, a charge-up time of the timing loop capacitor 24 so that after its capacitor 24 charges, the clock frequency 34 changes slightly.
In disk drive and other applications where data and the oscillator are at or very near the same frequencies there is little or no need to adjust the frequencies by multiple iterations as above. There is, however, a need in the industry to align the phase of the clock with the data without changing the frequency in an LC oscillator.
These needs and other are met by an embodiment of the present invention, herein disclosed as an LC sinusoidal oscillator comprising an inductive element connected to a supply voltage and a capacitive element connected to an applied voltage which generate an oscillation frequency proportional to the applied voltage, and a negative resistance structure connected to the inductive element and capacitive element; the capacitive element further comprises a fixed capacitor circuit, an incremental capacitive element and a decremental capacitive element connected in parallel to the fixed capacitor circuit. The incremental capacitive element may further comprise at least one field effect transistor whose gate is electrically connected to the capacitive element and whose source and drain are electrically connected to an incremental voltage source to change the state of the at least one field effect transistor to a depleted mode thereby decreasing the capacitance of the capacitive element and providing an instantaneous incremental frequency for phase alignment of the oscillation frequency. The decremental capacitive element may further comprise at least one field effect transistor whose gate is electrically connected to the capacitive element and whose source and drain are electrically connected to a decremental voltage source to change the state of the at least one field effect transistor to an inverted mode thereby increasing the capacitance on capacitive element and providing an instantaneous decremental frequency for phase alignment of the oscillation frequency.
The decremental and the incremental capacitive elements may be combined into the same LC oscillator circuit.
The invention may further be considered a phase correction circuit for an oscillator circuit having a capacitive element, the phase correction circuit comprising: an incremental capacitive element and a decremental capacitive element connected directly to the capacitive element of the oscillator circuit; wherein the phase correction circuit operates independently of any oscillation frequency correction of the oscillator circuit. The phase correction circuit may further comprise a band-switched integrated voltage controlled oscillator with an inductive element connected to the capacitive element. In an alternative embodiment, the phase correction circuit may further comprise a ring oscillator. In any event, the incremental capacitive element of the phase correction circuit may comprise at least one FET whose source and drain are electrically connected together and to an incremental voltage source, and whose gate is connected to the capacitive element wherein when an incremental voltage is applied for a sufficient time to allow the at least one FET to transition to a depleted mode, the capacitance of the capacitive element decreases for phase alignment of the oscillation frequency to an externally applied frequency. In a differential oscillator embodiment, the at least one FET further comprises two FETs whose source/drain are connected to the incremental voltage source. Similarly, the decremental capacitive element of the phase correction circuit may comprise at least one FET whose source and drain are electrically connected together and connected further to a decremental voltage source, and whose gate is connected to the capacitive node wherein when an decremental voltage is applied for a sufficient time to allow the at least one FET to transition to an inverted mode, the capacitance of the capacitive node increases for phase alignment of the oscillation frequency to an externally applied frequency. Likewise, in a differential voltage oscillator embodiment, the at least one FET further comprises two FETs whose source/drain are connected to the decremental voltage source.
The invention may further be considered a phase correction circuit connected to an oscillator, the oscillator comprising a fixed capacitive element and the phase correction circuit comprising at least one FET whose source and drain are electrically connected together, the at least one FET further connected to an incremental/decremental voltage source wherein an incremental/decremental voltage is applied for a sufficient time to allow the at least one FET to transition from either a depleted to an inverted mode or from an inverted to a depleted mode thereby providing an instantaneous incremental/decremental phase adjustment of the oscillator frequency.
The invention may yet still be considered a first circuit to vary the capacitance within a second circuit, comprising: a first FET capacitor network having a first and second FET connected to a first voltage, a second FET capacitor network having a third and fourth FET connected to a second voltage; the gates of the first and third FETs being connected to a capacitive node of the second circuit, the gates of the second and fourth FETs being connected to the capacitive node of the second circuit, the source/drain of the first FET tied to the source/drain of the second FET and to the first voltage, and the source drain of the third FET tied to the source/drain of the fourth FET and to the second voltage; whereupon when the first or the second voltage changes, the capacitance of the second circuit changes.
The recitation herein of a list of inventive features which are met by various embodiments of the present invention is not meant to imply or suggest that any or all of these features are present as essential or necessary features, either individually or collectively, in the most general embodiment of the present invention or in any of its more specific embodiments.